blob: 21669808c453313776f1bb570a71f48f950984f8 [file] [log] [blame]
Zvikomborero VIncent Zvikarambab7261682016-08-03 01:27:15 -04001/*
2 * Copyright (c) 2012 The Linux Foundation. All rights reserved.
3 *
4 * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
5 *
6 *
7 * Permission to use, copy, modify, and/or distribute this software for
8 * any purpose with or without fee is hereby granted, provided that the
9 * above copyright notice and this permission notice appear in all
10 * copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
13 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
14 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
15 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
16 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
17 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
18 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
19 * PERFORMANCE OF THIS SOFTWARE.
20 */
21
22/*
23 * This file was originally distributed by Qualcomm Atheros, Inc.
24 * under proprietary terms before Copyright ownership was assigned
25 * to the Linux Foundation.
26 */
27
28/**
29
30
31 pttMsgApi.h: Contains messages to PTT Module for physical layer testing
32 Author: Mark Nelson
33 Date: 6/21/05
34
35 History -
36 Date Modified by Modification Information
37 --------------------------------------------------------------------------
38
39 */
40
41#ifndef PTT_MSG_API_H
42#define PTT_MSG_API_H
43
44#include "halCompiler.h"
45#include "wlan_nv.h"
46#include "wlan_phy.h"
47#include "pttFrameGen.h"
48#include "pttModule.h"
49
50#include "halLegacyPalTypes.h"
51
52typedef tANI_U8 tQWPTT_U8;
53typedef tANI_S8 tQWPTT_S8;
54
55typedef tANI_U16 tQWPTT_U16;
56typedef tANI_S16 tQWPTT_S16;
57
58typedef tANI_U32 tQWPTT_U32;
59typedef tANI_S32 tQWPTT_S32;
60
61typedef tANI_U8 tQWPTT_BYTE;
62typedef tANI_S9 tQWPTT_S9;
63
64typedef tANI_U8 tQWPTT_BOOLEAN;
65
66#define PTT_MEM_ACCESS_MAX_SIZE 256
67
68//Messages to/from socket or pttApi.c
69typedef enum {
70 PTT_MSG_TYPES_BEGIN = 0x3000,
71
72 // Init
73 PTT_MSG_INIT = PTT_MSG_TYPES_BEGIN, //extra: internal only
74
75//NV Service
76 PTT_MSG_GET_TPC_CAL_STATE_OBSOLETE = 0x3011,
77 PTT_MSG_RESET_TPC_CAL_STATE_OBSOLETE = 0x3012,
78
79 PTT_MSG_SET_NV_CKSUM_OBSOLETE = 0x3013,
80 PTT_MSG_GET_NV_CKSUM_OBSOLETE = 0x3014,
81 PTT_MSG_GET_NV_TABLE = 0x3016,
82 PTT_MSG_SET_NV_TABLE = 0x3017,
83 PTT_MSG_SET_NV_IMAGE_OBSOLETE = 0x3018,
84 PTT_MSG_BLANK_NV = 0x3019,
85 PTT_MSG_GET_NV_IMAGE_OBSOLETE = 0x301E,
86 PTT_MSG_DEL_NV_TABLE = 0x301F,
87 PTT_MSG_GET_NV_FIELD = 0x3020,
88 PTT_MSG_SET_NV_FIELD = 0x3021,
89 PTT_MSG_STORE_NV_TABLE = 0x3022,
90 PTT_MSG_SET_REG_DOMAIN = 0x3023,
91
92//new NV format Service
93 PTT_MSG_GET_NV_BIN = 0x3030,
94 PTT_MSG_SET_NV_BIN = 0x3031,
95 PTT_MSG_GET_DICTIONARY = 0x3032,
96
97//Device Register Access
98 PTT_MSG_DBG_READ_REGISTER = 0x3040,
99 PTT_MSG_DBG_WRITE_REGISTER = 0x3041,
100 PTT_MSG_API_WRITE_REGISTER_OBSOLETE = 0x3042,
101 PTT_MSG_API_READ_REGISTER_OBSOLETE = 0x3043,
102 PTT_MSG_DBG_READ_MEMORY = 0x3044,
103 PTT_MSG_DBG_WRITE_MEMORY = 0x3045,
104
105//Device MAC Test Setup
106 PTT_MSG_ENABLE_CHAINS = 0x304F,
107 PTT_MSG_SET_CHANNEL = 0x3050,
108
109//Tx Waveform Gen Service
110 PTT_MSG_SET_WAVEFORM = 0x3071,
111 PTT_MSG_SET_TX_WAVEFORM_GAIN = 0x3072,
112 PTT_MSG_GET_WAVEFORM_POWER_ADC = 0x3073,
113 PTT_MSG_START_WAVEFORM = 0x3074,
114 PTT_MSG_STOP_WAVEFORM = 0x3075,
115 PTT_MSG_SET_RX_WAVEFORM_GAIN = 0x3076,
116 PTT_MSG_SET_TX_WAVEFORM_GAIN_PRIMA_V1 = 0x3077,
117
118//Tx Frame Gen Service
119 PTT_MSG_CONFIG_TX_PACKET_GEN = 0x3081,
120 PTT_MSG_START_STOP_TX_PACKET_GEN = 0x3082,
121 PTT_MSG_POLL_TX_PACKET_PROGRESS_OBSOLETE = 0x3083,
122 PTT_MSG_FRAME_GEN_STOP_IND_OBSOLETE = 0x3088,
123 PTT_MSG_QUERY_TX_STATUS = 0x3089,
124
125
126//Tx Frame Power Service
127 PTT_MSG_CLOSE_TPC_LOOP = 0x30A0,
128
129//open loop service
130 PTT_MSG_SET_PACKET_TX_GAIN_TABLE = 0x30A1,
131 PTT_MSG_SET_PACKET_TX_GAIN_INDEX = 0x30A2,
132 PTT_MSG_FORCE_PACKET_TX_GAIN = 0x30A3,
133
134//closed loop(CLPC) service
135 PTT_MSG_SET_PWR_INDEX_SOURCE = 0x30A4,
136 PTT_MSG_SET_TX_POWER = 0x30A5,
137 PTT_MSG_GET_TX_POWER_REPORT = 0x30A7,
138 PTT_MSG_SAVE_TX_PWR_CAL_TABLE_OBSOLETE = 0x30A8,
139 PTT_MSG_SET_POWER_LUT = 0x30A9,
140 PTT_MSG_GET_POWER_LUT = 0x30AA,
141 PTT_MSG_GET_PACKET_TX_GAIN_TABLE = 0x30AB,
142 PTT_MSG_SAVE_TX_PWR_FREQ_TABLE_OBSOLETE = 0x30AC,
143 PTT_MSG_CLPC_TEMP_COMPENSATION_OBSOLETE = 0x30AD,
144
145//Rx Gain Service
146 PTT_MSG_DISABLE_AGC_TABLES = 0x30D0,
147 PTT_MSG_ENABLE_AGC_TABLES = 0x30D1,
148 PTT_MSG_SET_AGC_TABLES_OBSOLETE = 0x30D2,
149 PTT_MSG_GET_RX_RSSI = 0x30D3,
150 PTT_MSG_GET_AGC_TABLE_OBSOLETE = 0x30D5,
151
152//Rx Frame Catcher Service
153 PTT_MSG_SET_RX_DISABLE_MODE = 0x30D4,
154 PTT_MSG_GET_RX_PKT_COUNTS = 0x30E0,
155 PTT_MSG_RESET_RX_PACKET_STATISTICS = 0x30E2,
156 PTT_MSG_GET_UNI_CAST_MAC_PKT_RX_RSSI = 0x30E3,
157 PTT_MSG_GET_UNI_CAST_MAC_PKT_RX_RSSI_CONFIG = 0x30E4,
158
159//Rx Symbol Service
160 PTT_MSG_GRAB_RAM = 0x30F0,
161 PTT_MSG_GRAB_RAM_ONE_CHAIN_OBSOLETE = 0x30F1,
162
163//Phy Calibration Service
164 PTT_MSG_RX_IQ_CAL = 0x3100,
165 PTT_MSG_RX_DCO_CAL = 0x3101,
166 PTT_MSG_TX_CARRIER_SUPPRESS_CAL = 0x3102,
167 PTT_MSG_TX_IQ_CAL = 0x3103,
168 PTT_MSG_EXECUTE_INITIAL_CALS = 0x3104,
169 PTT_MSG_HDET_CAL = 0x3105,
170 PTT_MSG_VCO_LINEARITY_CAL_OBSOLETE = 0x3106,
171
172//Phy Calibration Override Service
173 PTT_MSG_SET_TX_CARRIER_SUPPRESS_CORRECT = 0x3110,
174 PTT_MSG_GET_TX_CARRIER_SUPPRESS_CORRECT = 0x3111,
175 PTT_MSG_SET_TX_IQ_CORRECT = 0x3112,
176 PTT_MSG_GET_TX_IQ_CORRECT = 0x3113,
177 PTT_MSG_SET_RX_IQ_CORRECT = 0x3114,
178 PTT_MSG_GET_RX_IQ_CORRECT = 0x3115,
179 PTT_MSG_SET_RX_DCO_CORRECT = 0x3116,
180 PTT_MSG_GET_RX_DCO_CORRECT = 0x3117,
181 PTT_MSG_SET_TX_IQ_PHASE_NV_TABLE_OBSOLETE = 0x3118,
182 PTT_MSG_GET_HDET_CORRECT_OBSOLETE = 0x3119,
183
184//RF Chip Access
185 PTT_MSG_GET_TEMP_ADC = 0x3202,
186 PTT_MSG_READ_RF_REG = 0x3203,
187 PTT_MSG_WRITE_RF_REG = 0x3204,
188 PTT_MSG_GET_RF_VERSION = 0x3205,
189
190//Deep sleep support
191 PTT_MSG_DEEP_SLEEP = 0x3220,
192 PTT_MSG_READ_SIF_BAR4_REGISTER = 0x3221,
193 PTT_MSG_WRITE_SIF_BAR4_REGISTER = 0x3222,
194 PTT_MSG_ENTER_FULL_POWER = 0x3223,
195
196//Misc
197 PTT_MSG_SYSTEM_RESET = 0x32A0, //is there any meaning for this in Gen6?
198 PTT_MSG_LOG_DUMP = 0x32A1,
199 PTT_MSG_GET_BUILD_RELEASE_NUMBER = 0x32A2,
200
201
202//Messages for Socket App
203 PTT_MSG_ADAPTER_DISABLED_RSP_OBSOLETE = 0x32A3,
204 PTT_MSG_ENABLE_ADAPTER = 0x32A4,
205 PTT_MSG_DISABLE_ADAPTER = 0x32A5,
206 PTT_MSG_PAUSE_RSP_OBSOLETE = 0x32A6,
207 PTT_MSG_CONTINUE_RSP_OBSOLETE = 0x32A7,
208
209 PTT_MSG_HALPHY_INIT = 0x32A8,
210 PTT_MSG_TEST_RXIQ_CAL = 0x32A9,
211 PTT_MSG_START_TONE_GEN = 0x32AA,
212 PTT_MSG_STOP_TONE_GEN = 0x32AB,
213 PTT_MSG_RX_IM2_CAL = 0x32AC,
214 PTT_MSG_SET_RX_IM2_CORRECT = 0x31AD,
215 PTT_MSG_GET_RX_IM2_CORRECT = 0x31AE,
216 PTT_MSG_TEST_DPD_CAL = 0x32AF, // not handle
217 PTT_MSG_SET_CALCONTROL_BITMAP = 0x32B0,
218
219//[RY] specific new messages for PRIMA
220 PTT_MSG_START_WAVEFORM_RF = 0x32B1,
221 PTT_MSG_STOP_WAVEFORM_RF = 0x32B2,
222 PTT_MSG_HKDAC_TX_IQ_CAL = 0x32B3,
223 PTT_MSG_SET_HKADC_TX_IQ_CORRECT = 0x32B4,
224 PTT_MSG_GET_HKADC_TX_IQ_CORRECT = 0x32B5,
225 PTT_MSG_SET_DPD_CORRECT = 0x32B6,
226 PTT_MSG_GET_DPD_CORRECT = 0x32B7,
227 PTT_MSG_SET_WAVEFORM_RF = 0x32B8,
228 PTT_MSG_LNA_BAND_CAL = 0x32B9,
229 PTT_MSG_GET_LNA_BAND_CORRECT = 0x32BA,
230 PTT_MSG_SET_LNA_BAND_CORRECT = 0x32BB,
231 PTT_MSG_DPD_CAL = 0x32BC,
232
233// Suffix'ed Message ID to differential from existing Message name.
234// ===============================================================
235 PTT_MSG_GET_NV_TABLE_PRIMA_V1 = 0x32BD,
236 PTT_MSG_SET_NV_TABLE_PRIMA_V1 = 0x32BE,
237 PTT_MSG_RX_IQ_CAL_PRIMA_V1 = 0x32BF,
238 PTT_MSG_TX_IQ_CAL_PRIMA_V1 = 0x32C0,
239 PTT_MSG_SET_TX_IQ_CORRECT_PRIMA_V1 = 0x32C1,
240 PTT_MSG_GET_TX_IQ_CORRECT_PRIMA_V1 = 0x32C2,
241 PTT_MSG_SET_RX_IQ_CORRECT_PRIMA_V1 = 0x32C3,
242 PTT_MSG_GET_RX_IQ_CORRECT_PRIMA_V1 = 0x32C4,
243 PTT_MSG_START_WAVEFORM_PRIMA_V1 = 0x32C5,
244 PTT_MSG_FORCE_PACKET_TX_GAIN_PRIMA_V1 = 0x32C6,
245 PTT_MSG_CLPC_CAL_SETUP_PRIMA_V1 = 0x32C7,
246 PTT_MSG_CLPC_CAL_RESTORE_PRIMA_V1 = 0x32C8,
247 PTT_MSG_CLOSE_TPC_LOOP_PRIMA_V1 = 0x32C9,
248 PTT_MSG_SW_CLPC_CAL_PRIMA_V1 = 0x32CA,
249 PTT_MSG_CLPC_CAL_EXTRA_MEASUREMENT_PRIMA_V1 = 0x32CB,
250 PTT_MSG_PRIMA_GENERIC_CMD = 0x32CC,
251 PTT_MSG_DIGITAL_PIN_CONNECTIVITY_TEST_RES = 0X32CD,
252
253 PTT_MSG_EXIT = 0x32ff,
254 PTT_MAX_MSG_ID = PTT_MSG_EXIT
255} ePttMsgId;
256
257enum
258{
259 PTT_MSG_PRIMA_GENERIC_CMD_FAST_SET_CHANNEL = 0x0,
260};
261
262#define PTT_MSG_TYPES_BEGIN_30 PTT_MSG_TYPES_BEGIN
263#define PTT_MSG_TYPES_BEGIN_31 PTT_MSG_TYPES_BEGIN + 0x100
264#define PTT_MSG_TYPES_BEGIN_32 PTT_MSG_TYPES_BEGIN + 0x200
265
266// for FTM PER feature
267enum {
268Legacy_FTM = 0,
269FTM_PER_TX = 1,
270FTM_PER_RX = 2,
271};
272
273#ifndef tANI_BOOLEAN
274#define tANI_BOOLEAN tANI_U8
275#endif
276
277
278
279/******************************************************************************************************************
280 PTT MESSAGES
281******************************************************************************************************************/
282//Init
283typedef PACKED_PRE struct PACKED_POST {
284 tPttModuleVariables ptt;
285} tMsgPttMsgInit;
286
287typedef PACKED_PRE struct PACKED_POST {
288 tANI_U32 tableSize;
289 tANI_U32 chunkSize;
290 eNvTable nvTable;
291} tMsgPttGetNvTable;
292
293typedef PACKED_PRE struct PACKED_POST {
294 tANI_U32 tableSize;
295 tANI_U32 chunkSize;
296 eNvTable nvTable;
297} tMsgPttSetNvTable;
298
299typedef PACKED_PRE struct PACKED_POST {
300 eNvTable nvTable;
301} tMsgPttDelNvTable;
302
303typedef PACKED_PRE struct PACKED_POST {
304 tANI_U32 notUsed;
305} tMsgPttBlankNv;
306
307typedef PACKED_PRE struct PACKED_POST {
308 eNvField nvField;
309 uNvFields fieldData;
310} tMsgPttGetNvField;
311
312typedef PACKED_PRE struct PACKED_POST {
313 eNvField nvField;
314 uNvFields fieldData;
315} tMsgPttSetNvField;
316
317typedef PACKED_PRE struct PACKED_POST {
318 eNvTable nvTable;
319} tMsgPttStoreNvTable;
320
321typedef PACKED_PRE struct PACKED_POST {
322 eRegDomainId regDomainId;
323} tMsgPttSetRegDomain;
324
325typedef PACKED_PRE struct PACKED_POST {
326 tANI_U32 tableSize;
327 tANI_U32 chunkSize;
328 eNvTable nvTable;
329 tANI_U8 nvData[MAX_NV_BIN_SIZE];
330} tMsgPttGetNvBin;
331
332typedef PACKED_PRE struct PACKED_POST {
333 tANI_U32 tableSize;
334 tANI_U32 chunkSize;
335 eNvTable nvTable;
336 tANI_U8 nvData[MAX_NV_BIN_SIZE];
337} tMsgPttSetNvBin;
338
339//Device Register Access
340typedef PACKED_PRE struct PACKED_POST {
341 tANI_U32 regAddr;
342 tANI_U32 regValue;
343} tMsgPttDbgReadRegister;
344
345typedef PACKED_PRE struct PACKED_POST {
346 tANI_U32 regAddr;
347 tANI_U32 regValue;
348} tMsgPttDbgWriteRegister;
349
350#define PTT_READ_MEM_MAX 512
351typedef PACKED_PRE struct PACKED_POST {
352 tANI_U32 memAddr;
353 tANI_U32 nBytes;
354 tANI_U32 pMemBuf[PTT_READ_MEM_MAX]; //caller should allocate space
355} tMsgPttDbgReadMemory;
356
357typedef PACKED_PRE struct PACKED_POST {
358 tANI_U32 memAddr;
359 tANI_U32 nBytes;
360 tANI_U32 pMemBuf[PTT_READ_MEM_MAX];
361} tMsgPttDbgWriteMemory;
362
363//Device MAC Test Setup
364typedef PACKED_PRE struct PACKED_POST {
365 tANI_U32 chId;
366 ePhyChanBondState cbState;
367} tMsgPttSetChannel;
368
369typedef PACKED_PRE struct PACKED_POST {
370 ePhyChainSelect chainSelect;
371} tMsgPttEnableChains;
372
373typedef tIQSamples tWaveformSample;
374
375//Tx Waveform Gen Service
376typedef PACKED_PRE struct PACKED_POST {
377 tWaveformSample waveform[MAX_TEST_WAVEFORM_SAMPLES];
378 tANI_U16 numSamples;
379 tANI_BOOLEAN clk80;
380 tANI_U8 reserved[1];
381} tMsgPttSetWaveform;
382
383typedef PACKED_PRE struct PACKED_POST {
384 ePhyTxChains txChain;
385 tANI_U8 gain;
386} tMsgPttSetTxWaveformGain;
387
388typedef PACKED_PRE struct PACKED_POST {
389 ePhyTxChains txChain;
390 tANI_U32 gain;
391} tMsgPttSetTxWaveformGain_PRIMA_V1;
392
393typedef PACKED_PRE struct PACKED_POST {
394 ePhyRxChains rxChain;
395 tANI_U8 gain;
396} tMsgPttSetRxWaveformGain;
397
398typedef PACKED_PRE struct PACKED_POST {
399 sTxChainsPowerAdcReadings txPowerAdc;
400} tMsgPttGetWaveformPowerAdc;
401
402typedef PACKED_PRE struct PACKED_POST {
403 tANI_U32 notUsed;
404} tMsgPttStopWaveform;
405
406typedef PACKED_PRE struct PACKED_POST {
407 tANI_U32 notUsed;
408} tMsgPttClpcCalSetup_PRIMA_V1;
409
410typedef PACKED_PRE struct PACKED_POST {
411 tANI_U16 setup_measure;
412 tANI_U16 setup_txDmdPwrOffset;
413 tANI_U16 measure_totalExtraPt;
414 tANI_U16 measure_currentMeasurePtIdx;
415 tANI_U8 plut[256];
416} tMsgPttClpcCalExtraMeasurement_PRIMA_V1;
417
418typedef PACKED_PRE struct PACKED_POST {
419 tANI_U32 notUsed;
420} tMsgPttClpcCalRestore_PRIMA_V1;
421
422typedef PACKED_PRE struct PACKED_POST {
423 tANI_U32 startIndex;
424 tANI_U32 numSamples;
425} tMsgPttStartWaveform;
426
427typedef PACKED_PRE struct PACKED_POST {
428 tANI_U32 startIndex;
429 tANI_U32 numSamples;
430} tMsgPttStartWaveform_PRIMA_V1;
431
432// Added for PRIMA
433typedef PACKED_PRE struct PACKED_POST {
434 tWaveformSample waveform[MAX_TEST_WAVEFORM_SAMPLES];
435 tANI_U16 numSamples;
436 tANI_BOOLEAN clk80;
437 tANI_U8 reserved[1];
438} tMsgPttSetWaveformRF;
439
440typedef PACKED_PRE struct PACKED_POST {
441 tANI_U32 startIndex;
442 tANI_U32 numSamples;
443} tMsgPttStartWaveformRF;
444
445typedef PACKED_PRE struct PACKED_POST {
446 tANI_U32 notUsed;
447} tMsgPttStopWaveformRF;
448
449//Tx Frame Gen Service
450typedef PACKED_PRE struct PACKED_POST {
451 sPttFrameGenParams frameParams;
452} tMsgPttConfigTxPacketGen;
453
454typedef PACKED_PRE struct PACKED_POST {
455 tANI_BOOLEAN startStop;
456 tANI_U8 reserved[3];
457} tMsgPttStartStopTxPacketGen;
458
459typedef PACKED_PRE struct PACKED_POST {
460 sTxFrameCounters numFrames;
461 tANI_BOOLEAN status;
462 tANI_U8 reserved[3];
463} tMsgPttQueryTxStatus;
464
465//Tx Frame Power Service
466typedef PACKED_PRE struct PACKED_POST {
467 tANI_BOOLEAN tpcClose;
468 tANI_U8 reserved[3];
469} tMsgPttCloseTpcLoop;
470
471typedef PACKED_PRE struct PACKED_POST {
472 tANI_U32 tpcClose;
473} tMsgPttCloseTpcLoop_PRIMA_V1;
474
475
476 //open loop service
477typedef PACKED_PRE struct PACKED_POST {
478
479 ePhyTxChains txChain;
480 tANI_U8 minIndex;
481 tANI_U8 maxIndex;
482 tANI_U8 reserved[2];
483 tANI_U8 gainTable[TPC_MEM_GAIN_LUT_DEPTH];
484} tMsgPttSetPacketTxGainTable;
485
486typedef PACKED_PRE struct PACKED_POST {
487 ePhyTxChains txChain;
488 tANI_U8 gainTable[TPC_MEM_GAIN_LUT_DEPTH];
489} tMsgPttGetPacketTxGainTable;
490
491typedef PACKED_PRE struct PACKED_POST {
492 tANI_U8 index;
493 tANI_U8 reserved[3];
494} tMsgPttSetPacketTxGainIndex;
495
496typedef PACKED_PRE struct PACKED_POST {
497 ePhyTxChains txChain;
498 tANI_U8 gain;
499 tANI_U8 reserved[3];
500} tMsgPttForcePacketTxGain;
501
502typedef PACKED_PRE struct PACKED_POST {
503 ePhyTxChains txChain;
504 tANI_U32 gain;
505} tMsgPttForcePacketTxGain_PRIMA_V1;
506
507
508typedef PACKED_PRE struct PACKED_POST {
509 ePowerTempIndexSource indexSource;
510} tMsgPttSetPwrIndexSource;
511
512typedef PACKED_PRE struct PACKED_POST {
513 t2Decimal dbmPwr;
514 tANI_U8 reserved[2];
515} tMsgPttSetTxPower;
516
517typedef tTxPowerReport tMsgPttGetTxPowerReport;
518
519typedef PACKED_PRE struct PACKED_POST {
520 ePhyTxChains txChain;
521
522 tANI_U8 minIndex;
523 tANI_U8 maxIndex;
524 tANI_U8 reserved[2];
525
526 tANI_U8 powerLut[TPC_MEM_POWER_LUT_DEPTH];
527} tMsgPttSetPowerLut;
528
529typedef PACKED_PRE struct PACKED_POST {
530 ePhyTxChains txChain;
531
532 tANI_U8 powerLut[TPC_MEM_POWER_LUT_DEPTH];
533} tMsgPttGetPowerLut;
534
535
536//Rx Gain Service
537typedef PACKED_PRE struct PACKED_POST {
538 sRxChainsAgcDisable gains;
539} tMsgPttDisableAgcTables;
540
541
542typedef PACKED_PRE struct PACKED_POST {
543 sRxChainsAgcEnable enables;
544} tMsgPttEnableAgcTables;
545
546typedef PACKED_PRE struct PACKED_POST {
547 sRxChainsRssi rssi;
548} tMsgPttGetRxRssi;
549
550typedef PACKED_PRE struct PACKED_POST {
551 sRxChainsRssi rssi;
552}tMsgPttGetUnicastMacPktRxRssi;
553
554typedef PACKED_PRE struct PACKED_POST {
555 tANI_U32 conf;
556}tMsgPttGetUnicastMacPktRxRssiConf_PRIMA_V1;
557
558//Rx Frame Catcher Service
559typedef PACKED_PRE struct PACKED_POST {
560 sRxTypesDisabled disabled;
561} tMsgPttSetRxDisableMode;
562
563typedef PACKED_PRE struct PACKED_POST {
564 sRxFrameCounters counters;
565} tMsgPttGetRxPktCounts;
566
567
568typedef PACKED_PRE struct PACKED_POST {
569 tANI_U32 notUsed;
570} tMsgPttResetRxPacketStatistics;
571
572
573
574
575
576//ADC Sample Service
577typedef PACKED_PRE struct PACKED_POST {
578 tANI_U32 startSample; //index of first requested sample, 0 causes new capture
579 tANI_U32 numSamples; //number of samples to transfer to host
580 eGrabRamSampleType sampleType;
581 tGrabRamSample grabRam[MAX_REQUESTED_GRAB_RAM_SAMPLES];
582} tMsgPttGrabRam;
583
584
585//Phy Calibration Service
586typedef PACKED_PRE struct PACKED_POST {
587 sRxChainsIQCalValues calValues;
588 eGainSteps gain;
589} tMsgPttRxIqCal;
590
591typedef PACKED_PRE struct PACKED_POST {
592 tRxChainsDcoCorrections calValues;
593 tANI_U8 gain;
594} tMsgPttRxDcoCal;
595
596typedef PACKED_PRE struct PACKED_POST {
597 tRxChainsIm2Corrections calValues;
598 eGainSteps gain;
599 tANI_U8 im2CalOnly;
600} tMsgPttRxIm2Cal;
601
602typedef PACKED_PRE struct PACKED_POST {
603 sTxChainsLoCorrections calValues;
604 tANI_U8 reserve[2];
605 eGainSteps gain;
606} tMsgPttTxCarrierSuppressCal;
607
608typedef PACKED_PRE struct PACKED_POST {
609 sTxChainsIQCalValues calValues;
610 tANI_U8 reserve[2];
611 eGainSteps gain;
612} tMsgPttTxIqCal;
613
614typedef PACKED_PRE struct PACKED_POST {
615 sTxChainsHKIQCalValues calValues;
616 eGainSteps gain;
617} tMsgPttHKdacTxIqCal;
618
619typedef PACKED_PRE struct PACKED_POST {
620 tANI_U32 unused;
621} tMsgPttExecuteInitialCals;
622
623typedef PACKED_PRE struct PACKED_POST {
624 sRfHdetCalValues hdetCalValues;
625} tMsgPttHdetCal;
626
627typedef PACKED_PRE struct PACKED_POST {
628 tANI_U16 clpcMode;
629 tANI_U16 txCmdPwr;
630 tANI_U16 pwrMax_pwrMin;
631 tANI_U16 step;
632 tANI_U8 plut[256];
633} tMsgPttClpcSwCal_PRIMA_V1;
634
635
636//Phy Calibration Override Service
637typedef PACKED_PRE struct PACKED_POST {
638 sTxChainsLoCorrections calValues;
639 tANI_U8 reserve[2];
640 eGainSteps gain;
641} tMsgPttSetTxCarrierSuppressCorrect;
642
643typedef PACKED_PRE struct PACKED_POST {
644 sTxChainsLoCorrections calValues;
645 tANI_U8 reserve[2];
646 eGainSteps gain;
647} tMsgPttGetTxCarrierSuppressCorrect;
648
649typedef PACKED_PRE struct PACKED_POST {
650 sTxChainsIQCalValues calValues;
651 tANI_U8 reserve[2];
652 eGainSteps gain;
653} tMsgPttSetTxIqCorrect;
654
655typedef PACKED_PRE struct PACKED_POST {
656 sTxChainsIQCalValues calValues;
657 tANI_U8 reserve[2];
658 eGainSteps gain;
659} tMsgPttGetTxIqCorrect;
660
661typedef PACKED_PRE struct PACKED_POST {
662 sTxChainsHKIQCalValues calValues;
663 eGainSteps gain;
664} tMsgPttHKdacSetTxIqCorrect;
665
666typedef PACKED_PRE struct PACKED_POST {
667 sTxChainsHKIQCalValues calValues;
668 eGainSteps gain;
669} tMsgPttHKdacGetTxIqCorrect;
670
671typedef PACKED_PRE struct PACKED_POST {
672 sRxChainsIQCalValues calValues;
673 eGainSteps gain;
674} tMsgPttSetRxIqCorrect;
675
676typedef PACKED_PRE struct PACKED_POST {
677 sRxChainsIQCalValues calValues;
678 eGainSteps gain;
679} tMsgPttGetRxIqCorrect;
680
681typedef PACKED_PRE struct PACKED_POST {
682 tRxChainsDcoCorrections calValues;
683 tANI_U8 gain;
684} tMsgPttSetRxDcoCorrect;
685
686typedef PACKED_PRE struct PACKED_POST {
687 tRxChainsDcoCorrections calValues;
688 tANI_U8 gain;
689} tMsgPttGetRxDcoCorrect;
690
691typedef PACKED_PRE struct PACKED_POST {
692 tRxChainsIm2Corrections calValues;
693 tANI_U8 dummy;
694} tMsgPttSetRxIm2Correct;
695
696typedef PACKED_PRE struct PACKED_POST {
697 tRxChainsIm2Corrections calValues;
698 tANI_U8 dummy;
699} tMsgPttGetRxIm2Correct;
700
701typedef PACKED_PRE struct PACKED_POST {
702 eRfTempSensor tempSensor;
703 tTempADCVal tempAdc;
704 tANI_U8 reserved[4 - sizeof(tTempADCVal)];
705} tMsgPttGetTempAdc;
706
707typedef PACKED_PRE struct PACKED_POST {
708 tANI_U32 addr;
709 tANI_U32 mask;
710 tANI_U32 shift;
711 tANI_U32 value;
712} tMsgPttReadRfField;
713
714typedef PACKED_PRE struct PACKED_POST {
715 tANI_U32 addr;
716 tANI_U32 mask;
717 tANI_U32 shift;
718 tANI_U32 value;
719} tMsgPttWriteRfField;
720
721//SIF bar4 Register Access
722typedef PACKED_PRE struct PACKED_POST {
723 tANI_U32 sifRegAddr;
724 tANI_U32 sifRegValue;
725} tMsgPttReadSifBar4Register;
726
727typedef PACKED_PRE struct PACKED_POST {
728 tANI_U32 sifRegAddr;
729 tANI_U32 sifRegValue;
730} tMsgPttWriteSifBar4Register;
731
732typedef PACKED_PRE struct PACKED_POST {
733 tANI_U32 notUsed;
734} tMsgPttDeepSleep;
735
736typedef PACKED_PRE struct PACKED_POST {
737 tANI_U32 notUsed;
738} tMsgPttEnterFullPower;
739
740//Misc.
741typedef PACKED_PRE struct PACKED_POST {
742 tANI_U32 notUsed;
743} tMsgPttSystemReset;
744
745typedef PACKED_PRE struct PACKED_POST {
746 tANI_U32 cmd;
747 tANI_U32 arg1;
748 tANI_U32 arg2;
749 tANI_U32 arg3;
750 tANI_U32 arg4;
751} tMsgPttLogDump;
752
753typedef PACKED_PRE struct PACKED_POST {
754 sBuildReleaseParams relParams;
755} tMsgPttGetBuildReleaseNumber;
756
757typedef PACKED_PRE struct PACKED_POST {
758 tANI_U32 revId;
759} tMsgPttGetRFVersion;
760
761typedef PACKED_PRE struct PACKED_POST {
762 tANI_U32 option; //dummy variable
763} tMsgPttCalControlBitmap;
764
765//#ifdef VERIFY_HALPHY_SIMV_MODEL
766
767
768typedef PACKED_PRE struct PACKED_POST {
769 tANI_U32 option; //dummy variable
770} tMsgPttHalPhyInit;
771
772typedef PACKED_PRE struct PACKED_POST {
773 tANI_U32 option; //dummy variable
774} tMsgPttRxIQTest;
775
776typedef PACKED_PRE struct PACKED_POST {
777 sTxChainsDPDCalValues calValues;
778 eGainSteps gain;
779} tMsgPttDpdCal;
780
781typedef PACKED_PRE struct PACKED_POST {
782 tANI_U8 lutIdx;
783 tANI_U8 band;
784} tMsgPttStartToneGen;
785
786typedef PACKED_PRE struct PACKED_POST {
787 tANI_U32 option; //dummy variable
788} tMsgPttStopToneGen;
789
790typedef PACKED_PRE struct PACKED_POST {
791 sTxChainsLnaBandCalValues calValues;
792 eGainSteps gain;
793} tMsgPttLnaBandCal;
794
795typedef PACKED_PRE struct PACKED_POST {
796 sTxChainsLnaBandCalValues calValues;
797 eGainSteps gain;
798} tMsgPttGetLnaBandCalCorrect;
799
800typedef PACKED_PRE struct PACKED_POST {
801 sTxChainsLnaBandCalValues calValues;
802 eGainSteps gain;
803} tMsgPttSetLnaBandCalCorrect;
804
805typedef PACKED_PRE struct PACKED_POST {
806 sTxChainsDPDCalValues calValues;
807 eGainSteps gain;
808}tMsgPttSetDPDCorrect;
809
810typedef PACKED_PRE struct PACKED_POST {
811 sTxChainsDPDCalValues calValues;
812 eGainSteps gain;
813}tMsgPttGetDPDCorrect;
814
815typedef PACKED_PRE struct PACKED_POST {
816 tQWPTT_U32 cmdIdx;
817 tQWPTT_U32 param1;
818 tQWPTT_U32 param2;
819 tQWPTT_U32 param3;
820 tQWPTT_U32 param4;
821} tMsgPttPrimaGenericCmd;
822
823typedef PACKED_PRE struct PACKED_POST {
824 tANI_U16 testID;
825 tANI_U16 result;
826} tMsgPttPinConnTestRes;
827//#endif
828
829/******************************************************************************************************************
830 END OF PTT MESSAGES
831******************************************************************************************************************/
832
833typedef PACKED_PRE union PACKED_POST pttMsgUnion{
834//typedef union pttMsgUnion {
835 tMsgPttMsgInit MsgInit;
836 tMsgPttGetNvTable GetNvTable;
837 tMsgPttSetNvTable SetNvTable;
838 tMsgPttDelNvTable DelNvTable;
839 tMsgPttBlankNv BlankNv;
840 tMsgPttStoreNvTable StoreNvTable;
841 tMsgPttSetRegDomain SetRegDomain;
842 tMsgPttGetNvField GetNvField;
843 tMsgPttSetNvField SetNvField;
844 tMsgPttGetNvBin GetNvBin;
845 tMsgPttSetNvBin SetNvBin;
846 tMsgPttDbgReadRegister DbgReadRegister;
847 tMsgPttDbgWriteRegister DbgWriteRegister;
848 tMsgPttDbgReadMemory DbgReadMemory;
849 tMsgPttDbgWriteMemory DbgWriteMemory;
850 tMsgPttEnableChains EnableChains;
851 tMsgPttSetChannel SetChannel;
852 tMsgPttSetWaveform SetWaveform;
853 tMsgPttSetTxWaveformGain SetTxWaveformGain;
854 tMsgPttSetTxWaveformGain_PRIMA_V1 SetTxWaveformGain_PRIMA_V1;
855 tMsgPttGetWaveformPowerAdc GetWaveformPowerAdc;
856 tMsgPttStartWaveform StartWaveform;
857 tMsgPttStartWaveform_PRIMA_V1 StartWaveform_PRIMA_V1;
858 tMsgPttStopWaveform StopWaveform;
859 tMsgPttSetRxWaveformGain SetRxWaveformGain;
860 tMsgPttConfigTxPacketGen ConfigTxPacketGen;
861 tMsgPttStartStopTxPacketGen StartStopTxPacketGen;
862 tMsgPttQueryTxStatus QueryTxStatus;
863 tMsgPttCloseTpcLoop CloseTpcLoop;
864 tMsgPttCloseTpcLoop_PRIMA_V1 CloseTpcLoop_PRIMA_V1;
865 tMsgPttSetPacketTxGainTable SetPacketTxGainTable;
866 tMsgPttGetPacketTxGainTable GetPacketTxGainTable;
867 tMsgPttSetPacketTxGainIndex SetPacketTxGainIndex;
868 tMsgPttForcePacketTxGain ForcePacketTxGain;
869 tMsgPttForcePacketTxGain_PRIMA_V1 ForcePacketTxGain_PRIMA_V1;
870 tMsgPttSetPwrIndexSource SetPwrIndexSource;
871 tMsgPttSetTxPower SetTxPower;
872 tMsgPttGetTxPowerReport GetTxPowerReport;
873 tMsgPttSetPowerLut SetPowerLut;
874 tMsgPttGetPowerLut GetPowerLut;
875 tMsgPttDisableAgcTables DisableAgcTables;
876 tMsgPttEnableAgcTables EnableAgcTables;
877 tMsgPttGetRxRssi GetRxRssi;
878 tMsgPttGetUnicastMacPktRxRssi GetUnicastMacPktRxRssi;
879 tMsgPttGetUnicastMacPktRxRssiConf_PRIMA_V1 GetUnicastMacPktRxRssiConf_PRIMA_V1;
880 tMsgPttSetRxDisableMode SetRxDisableMode;
881 tMsgPttGetRxPktCounts GetRxPktCounts;
882 tMsgPttResetRxPacketStatistics ResetRxPacketStatistics;
883 tMsgPttGrabRam GrabRam;
884 tMsgPttRxIqCal RxIqCal;
885 tMsgPttRxDcoCal RxDcoCal;
886 tMsgPttRxIm2Cal RxIm2Cal;
887
888 tMsgPttExecuteInitialCals ExecuteInitialCals;
889 tMsgPttTxCarrierSuppressCal TxCarrierSuppressCal;
890 tMsgPttTxIqCal TxIqCal;
891 tMsgPttHKdacTxIqCal HKdacTxIqCal;
892 tMsgPttClpcCalSetup_PRIMA_V1 ClpcCalSetup_PRIMA_V1;
893 tMsgPttClpcCalRestore_PRIMA_V1 ClpcCalRestore_PRIMA_V1;
894 tMsgPttHdetCal HdetCal;
895 tMsgPttClpcSwCal_PRIMA_V1 ClpcSwCal_PRIMA_V1;
896 tMsgPttClpcCalExtraMeasurement_PRIMA_V1 ClpcCalExtraMeasurement_PRIMA_V1;
897 tMsgPttSetTxCarrierSuppressCorrect SetTxCarrierSuppressCorrect;
898 tMsgPttGetTxCarrierSuppressCorrect GetTxCarrierSuppressCorrect;
899 tMsgPttSetTxIqCorrect SetTxIqCorrect;
900 tMsgPttGetTxIqCorrect GetTxIqCorrect;
901 tMsgPttSetRxIqCorrect SetRxIqCorrect;
902 tMsgPttGetRxIqCorrect GetRxIqCorrect;
903 tMsgPttSetRxDcoCorrect SetRxDcoCorrect;
904 tMsgPttGetRxDcoCorrect GetRxDcoCorrect;
905 tMsgPttSetRxIm2Correct SetRxIm2Correct;
906 tMsgPttGetRxIm2Correct GetRxIm2Correct;
907 tMsgPttHKdacSetTxIqCorrect HKdacSetTxIqCorrect;
908 tMsgPttHKdacGetTxIqCorrect HKdacGetTxIqCorrect;
909
910 tMsgPttGetTempAdc GetTempAdc;
911 tMsgPttReadRfField ReadRfField;
912 tMsgPttWriteRfField WriteRfField;
913 tMsgPttCalControlBitmap SetCalControlBitmap;
914
915//#ifdef VERIFY_HALPHY_SIMV_MODEL
916
917 tMsgPttHalPhyInit InitOption;
918 tMsgPttRxIQTest RxIQTest;
919 tMsgPttDpdCal DpdCal;
920 tMsgPttStartToneGen StartToneGen;
921 tMsgPttStopToneGen StopToneGen;
922//#endif
923 tMsgPttDeepSleep DeepSleep;
924 tMsgPttReadSifBar4Register ReadSifBar4Register;
925 tMsgPttWriteSifBar4Register WriteSifBar4Register;
926 tMsgPttEnterFullPower EnterFullPower;
927 tMsgPttSystemReset SystemReset;
928 tMsgPttLogDump LogDump;
929 tMsgPttGetBuildReleaseNumber GetBuildReleaseNumber;
930 tMsgPttGetRFVersion GetRFVersion;
931
932//[RY] added for PRIMA
933 tMsgPttSetWaveformRF SetWaveformRF;
934 tMsgPttStopWaveformRF StopWaveformRF;
935 tMsgPttStartWaveformRF StartWaveformRF;
936 tMsgPttLnaBandCal LnaBandCal;
937 tMsgPttGetLnaBandCalCorrect GetLnaBandCalCorrect;
938 tMsgPttSetLnaBandCalCorrect SetLnaBandCalCorrect;
939 tMsgPttGetDPDCorrect GetDPDCorrect;
940 tMsgPttSetDPDCorrect SetDPDCorrect;
941 tMsgPttDpdCal DPDCal;
942 tMsgPttPrimaGenericCmd PrimaGenericCmd;
943 tMsgPttPinConnTestRes PinConnTestRes;
944} uPttMsgs;
945
946typedef PACKED_PRE struct PACKED_POST {
947 tANI_U16 msgId;
948 tANI_U16 msgBodyLength; //actually, the length of all the fields in this structure
949 eQWPttStatus msgResponse;
950 uPttMsgs msgBody;
951} tPttMsgbuffer, *tpPttMsgbuffer;
952
953
954typedef PACKED_PRE struct PACKED_POST {
955 /*
956 * success or failure
957 */
958 tANI_U32 status;
959 tPttMsgbuffer pttMsgBuffer;
960} tProcessPttRspParams, *tpProcessPttRspParams;
961
962/* End of Ptt Parameters */
963
964#endif