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gerrit.twrp.me / android_bootable_recovery / 7ce7f0cde40bf127196cfac4bedce79ac5c59d77 / . / libjpegtwrp / asm / armv7 / jdcolor-armv7.S
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Dees_Troy51a0e822012-09-05 15:24:24 -0400[diff] [blame]1/*------------------------------------------------------------------------
2* jdcolor-armv7.S
3*
4* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
5*
6* Redistribution and use in source and binary forms, with or without
7* modification, are permitted provided that the following conditions are
8* met:
9* * Redistributions of source code must retain the above copyright
10* notice, this list of conditions and the following disclaimer.
11* * Redistributions in binary form must reproduce the above
12* copyright notice, this list of conditions and the following
13* disclaimer in the documentation and/or other materials provided
14* with the distribution.
15* * Neither the name of Code Aurora Forum, Inc. nor the names of its
16* contributors may be used to endorse or promote products derived
17* from this software without specific prior written permission.
18*
19* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
20* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
22* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
23* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
26* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
28* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
29* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30*--------------------------------------------------------------------------
31
32*--------------------------------------------------------------------------
33* FUNCTION LIST
34*--------------------------------------------------------------------------
35*
36* - yvup2bgr888_venum
37* - yyvup2bgr888_venum
38*
39*--------------------------------------------------------------------------
40*/
41
42 .section yvu_plain_to_bgr, "x" @ AREA
43 .text @ |.text|, CODE, READONLY
44 .align 2
45 .code 32 @ CODE32
46
47/*-----------------------------------------------------------------------------
48 * ARM Registers
49 * ---------------------------------------------------------------------------- */
50p_y .req r0
51p_cr .req r1
52p_cb .req r2
53p_rgb .req r3
54p_bgr .req r3
55length .req r12
56
57 .global yvup2bgr888_venum
58 .global yyvup2bgr888_venum
59
60@ coefficients in color conversion matrix multiplication
61.equ COEFF_Y, 256 @ contribution of Y
62.equ COEFF_V_RED, 359 @ contribution of V for red
63.equ COEFF_U_GREEN, -88 @ contribution of U for green
64.equ COEFF_V_GREEN, -183 @ contribution of V for green
65.equ COEFF_U_BLUE, 454 @ contribution of U for blue
66
67@ Clamping constants 0x0 and 0xFF
68.equ COEFF_0, 0
69.equ COEFF_255, 255
70
71@ Bias coefficients for red, green and blue
72.equ COEFF_BIAS_R, -45824 @ Red bias = -359*128 + 128
73.equ COEFF_BIAS_G, 34816 @ Green bias = (88+183)*128 + 128
74.equ COEFF_BIAS_B, -57984 @ Blue bias = -454*128 + 128
75
76constants:
77 .hword (COEFF_V_RED), (COEFF_U_GREEN), (COEFF_V_GREEN), (COEFF_U_BLUE) @ 359 | -88 | -183 | 454
78 .hword (COEFF_Y), (COEFF_0), (COEFF_255) , (COEFF_0) @ 256 | 0 | 255 | 0
79 .word (COEFF_BIAS_R), (COEFF_BIAS_G), (COEFF_BIAS_B) @ -45824 | 34816 | -57984 | X
80
81/*--------------------------------------------------------------------------
82* FUNCTION : yvup2bgr888_venum
83*--------------------------------------------------------------------------
84* DESCRIPTION : Perform YVU planar to BGR888 conversion.
85*--------------------------------------------------------------------------
86* C PROTOTYPE : void yvup2bgr888_venum(uint8_t *p_y,
87* uint8_t *p_cr,
88* uint8_t *p_cb,
89* uint8_t *p_bgr888,
90* uint32_t length)
91*--------------------------------------------------------------------------
92* REG INPUT : R0: uint8_t *p_y
93* pointer to the input Y Line
94* R1: uint8_t *p_cr
95* pointer to the input Cr Line
96* R2: uint8_t *p_cb
97* pointer to the input Cb Line
98* R3: uint8_t *p_bgr888
99* pointer to the output BGR Line
100* R12: uint32_t length
101* width of Line
102*--------------------------------------------------------------------------
103* STACK ARG : None
104*--------------------------------------------------------------------------
105* REG OUTPUT : None
106*--------------------------------------------------------------------------
107* MEM INPUT : p_y - a line of Y pixels
108* p_cr - a line of Cr pixels
109* p_cb - a line of Cb pixels
110* length - the width of the input line
111*--------------------------------------------------------------------------
112* MEM OUTPUT : p_bgr888 - the converted bgr pixels
113*--------------------------------------------------------------------------
114* REG AFFECTED : ARM: R0-R4, R12
115* NEON: Q0-Q15
116*--------------------------------------------------------------------------
117* STACK USAGE : none
118*--------------------------------------------------------------------------
119* CYCLES : none
120*
121*--------------------------------------------------------------------------
122* NOTES :
123*--------------------------------------------------------------------------
124*/
125.type yvup2bgr888_venum, %function
126yvup2bgr888_venum:
127
128 /*-------------------------------------------------------------------------
129 * Store stack registers
130 * ------------------------------------------------------------------------ */
131 STMFD SP!, {LR}
132
133 VPUSH {D8-D15}
134
135 PLD [R0, R3] @ preload luma line
136
137 ADR R12, constants
138
139 VLD1.S16 {D6, D7}, [R12]! @ D6, D7: 359 | -88 | -183 | 454 | 256 | 0 | 255 | 0
140 VLD1.S32 {D30, D31}, [R12] @ Q15 : -45824 | 34816 | -57984 | X
141
142 /*-------------------------------------------------------------------------
143 * Load the 5th parameter via stack
144 * R0 ~ R3 are used to pass the first 4 parameters, the 5th and above
145 * parameters are passed via stack
146 * ------------------------------------------------------------------------ */
147 LDR R12, [SP, #68] @ LR is pushed into the stack so SP is
148 @ decreased by 4,
149 @ D8-D15 are also pushed into the stack
150 @ so SP is decreased by
151 @ 8-byte/D-Register * 8 D-Registers = 64,
152 @ so SP needs to be increased by 64+4=68
153 @ to get the value that was first pushed
154 @ into stack (the 5th parameter passed in
155 @ throught stack)
156
157 /*-------------------------------------------------------------------------
158 * Load clamping parameters to duplicate vector elements
159 * ------------------------------------------------------------------------ */
160 VDUP.S16 Q4, D7[1] @ Q4: 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0
161 VDUP.S16 Q5, D7[2] @ Q5: 255 | 255 | 255 | 255 | 255 | 255 | 255 | 255
162
163 /*-------------------------------------------------------------------------
164 * Read bias
165 * ------------------------------------------------------------------------ */
166 VDUP.S32 Q0, D30[0] @ Q0: -45824 | -45824 | -45824 | -45824
167 VDUP.S32 Q1, D30[1] @ Q1: 34816 | 34816 | 34816 | 34816
168 VDUP.S32 Q2, D31[0] @ Q2: -57984 | -57984 | -57984 | -57984
169
170
171 /*-------------------------------------------------------------------------
172 * The main loop
173 * ------------------------------------------------------------------------ */
174loop_yvup2bgr888:
175
176 /*-------------------------------------------------------------------------
177 * Load input from Y, V and U
178 * D12 : Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
179 * D14 : V0 V1 V2 V3 V4 V5 V6 V7
180 * D15 : U0 U1 U2 U3 U4 U5 U6 U7
181 * ------------------------------------------------------------------------ */
182 VLD1.U8 {D12}, [p_y]! @ Load 8 Luma elements (uint8) to D12
183 VLD1.U8 {D14}, [p_cr]! @ Load 8 Cr elements (uint8) to D14
184 VLD1.U8 {D15}, [p_cb]! @ Load 8 Cb elements (uint8) to D15
185
186 /*-------------------------------------------------------------------------
187 * Expand uint8 value to uint16
188 * D18, D19: Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
189 * D20, D21: V0 V1 V2 V3 V4 V5 V6 V7
190 * D22, D23: U0 U1 U2 U3 U4 U5 U6 U7
191 * ------------------------------------------------------------------------ */
192 VMOVL.U8 Q9, D12
193 VMOVL.U8 Q10, D14
194 VMOVL.U8 Q11, D15
195
196 /*-------------------------------------------------------------------------
197 * Multiply contribution from chrominance, results are in 32-bit
198 * ------------------------------------------------------------------------ */
199 VMULL.S16 Q12, D20, D6[0] @ Q12: 359*(V0,V1,V2,V3) Red
200 VMULL.S16 Q13, D22, D6[1] @ Q13: -88*(U0,U1,U2,U3) Green
201 VMLAL.S16 Q13, D20, D6[2] @ Q13: -88*(U0,U1,U2,U3) - 183*(V0,V1,V2,V3)
202 VMULL.S16 Q14, D22, D6[3] @ Q14: 454*(U0,U1,U2,U3) Blue
203
204 /*-------------------------------------------------------------------------
205 * Add bias
206 * ------------------------------------------------------------------------ */
207 VADD.S32 Q12, Q0 @ Q12 add Red bias -45824
208 VADD.S32 Q13, Q1 @ Q13 add Green bias 34816
209 VADD.S32 Q14, Q2 @ Q14 add Blue bias -57984
210
211 /*-------------------------------------------------------------------------
212 * Calculate Red, Green, Blue
213 * ------------------------------------------------------------------------ */
214 VMLAL.S16 Q12, D18, D7[0] @ Q12: R0, R1, R2, R3 in 32-bit Q8 format
215 VMLAL.S16 Q13, D18, D7[0] @ Q13: G0, G1, G2, G3 in 32-bit Q8 format
216 VMLAL.S16 Q14, D18, D7[0] @ Q14: B0, B1, B2, B3 in 32-bit Q8 format
217
218 /*-------------------------------------------------------------------------
219 * Right shift eight bits with rounding
220 * ------------------------------------------------------------------------ */
221 VSHRN.S32 D18 , Q12, #8 @ D18: R0, R1, R2, R3 in 16-bit Q0 format
222 VSHRN.S32 D20 , Q13, #8 @ D20: G0, G1, G2, G3 in 16-bit Q0 format
223 VSHRN.S32 D22, Q14, #8 @ D22: B0, B1, B2, B3 in 16-bit Q0 format
224
225 /*-------------------------------------------------------------------------
226 * Done with the first 4 elements, continue on the next 4 elements
227 * ------------------------------------------------------------------------ */
228
229 /*-------------------------------------------------------------------------
230 * Multiply contribution from chrominance, results are in 32-bit
231 * ------------------------------------------------------------------------ */
232 VMULL.S16 Q12, D21, D6[0] @ Q12: 359*(V0,V1,V2,V3) Red
233 VMULL.S16 Q13, D23, D6[1] @ Q13: -88*(U0,U1,U2,U3) Green
234 VMLAL.S16 Q13, D21, D6[2] @ Q13: -88*(U0,U1,U2,U3) - 183*(V0,V1,V2,V3)
235 VMULL.S16 Q14, D23, D6[3] @ Q14: 454*(U0,U1,U2,U3) Blue
236
237 /*-------------------------------------------------------------------------
238 * Add bias
239 * ------------------------------------------------------------------------ */
240 VADD.S32 Q12, Q0 @ Q12 add Red bias -45824
241 VADD.S32 Q13, Q1 @ Q13 add Green bias 34816
242 VADD.S32 Q14, Q2 @ Q14 add Blue bias -57984
243
244 /*-------------------------------------------------------------------------
245 * Calculate Red, Green, Blue
246 * ------------------------------------------------------------------------ */
247 VMLAL.S16 Q12, D19, D7[0] @ Q12: R0, R1, R2, R3 in 32-bit Q8 format
248 VMLAL.S16 Q13, D19, D7[0] @ Q13: G0, G1, G2, G3 in 32-bit Q8 format
249 VMLAL.S16 Q14, D19, D7[0] @ Q14: B0, B1, B2, B3 in 32-bit Q8 format
250
251 /*-------------------------------------------------------------------------
252 * Right shift eight bits with rounding
253 * ------------------------------------------------------------------------ */
254 VSHRN.S32 D19 , Q12, #8 @ D18: R0, R1, R2, R3 in 16-bit Q0 format
255 VSHRN.S32 D21 , Q13, #8 @ D20: G0, G1, G2, G3 in 16-bit Q0 format
256 VSHRN.S32 D23, Q14, #8 @ D22: B0, B1, B2, B3 in 16-bit Q0 format
257
258 /*-------------------------------------------------------------------------
259 * Clamp the value to be within [0~255]
260 * ------------------------------------------------------------------------ */
261 VMAX.S16 Q11, Q11, Q4 @ if Q11 < 0, Q11 = 0
262 VMIN.S16 Q11, Q11, Q5 @ if Q11 > 255, Q11 = 255
263 VQMOVUN.S16 D28, Q11 @ store Blue to D28, narrow the value from int16 to int8
264
265 VMAX.S16 Q10, Q10, Q4 @ if Q10 < 0, Q10 = 0
266 VMIN.S16 Q10, Q10, Q5 @ if Q10 > 255, Q10 = 255
267 VQMOVUN.S16 D27, Q10 @ store Green to D27, narrow the value from int16 to int8
268
269 VMAX.S16 Q9, Q9, Q4 @ if Q9 < 0, Q9 = 0
270 VMIN.S16 Q9, Q9, Q5 @ if Q9 > 255, Q9 = 255
271 VQMOVUN.S16 D26, Q9 @ store Red to D26, narrow the value from int16 to int8.
272
273 SUBS length, length, #8 @ check if the length is less than 8
274
275 BMI trailing_yvup2bgr888 @ jump to trailing processing if remaining length is less than 8
276
277 VST3.U8 {D26,D27,D28}, [p_bgr]! @ vector store Red, Green, Blue to destination
278 @ Blue at LSB
279
280 BHI loop_yvup2bgr888 @ loop if more than 8 pixels left
281
282 BEQ end_yvup2bgr888 @ done if exactly 8 pixel processed in the loop
283
284
285trailing_yvup2bgr888:
286 /*-------------------------------------------------------------------------
287 * There are from 1 ~ 7 pixels left in the trailing part.
288 * First adding 7 to the length so the length would be from 0 ~ 6.
289 * eg: 1 pixel left in the trailing part, so 1-8+7 = 0.
290 * Then save 1 pixel unconditionally since at least 1 pixels left in the
291 * trailing part.
292 * ------------------------------------------------------------------------ */
293 ADDS length, length, #7 @ there are 7 or less in the trailing part
294
295 VST3.U8 {D26[0], D27[0], D28[0]}, [p_bgr]! @ at least 1 pixel left in the trailing part
296 BEQ end_yvup2bgr888 @ done if 0 pixel left
297
298 SUBS length, length, #1 @ update length counter
299 VST3.U8 {D26[1], D27[1], D28[1]}, [p_bgr]! @ store one more pixel
300 BEQ end_yvup2bgr888 @ done if 0 pixel left
301
302 SUBS length, length, #1 @ update length counter
303 VST3.U8 {D26[2], D27[2], D28[2]}, [p_bgr]! @ store one more pixel
304 BEQ end_yvup2bgr888 @ done if 0 pixel left
305
306 SUBS length, length, #1 @ update length counter
307 VST3.U8 {D26[3], D27[3], D28[3]}, [p_bgr]! @ store one more pixel
308 BEQ end_yvup2bgr888 @ done if 0 pixel left
309
310 SUBS length, length, #1 @ update length counter
311 VST3.U8 {D26[4], D27[4], D28[4]}, [p_bgr]! @ store one more pixel
312 BEQ end_yvup2bgr888 @ done if 0 pixel left
313
314 SUBS length, length, #1 @ update length counter
315 VST3.U8 {D26[5], D27[5], D28[5]}, [p_bgr]! @ store one more pixel
316 BEQ end_yvup2bgr888 @ done if 0 pixel left
317
318 SUBS length, length, #1 @ update length counter
319 VST3.U8 {D26[6], D27[6], D28[6]}, [p_bgr]! @ store one more pixel
320
321end_yvup2bgr888:
322 VPOP {D8-D15}
323 LDMFD SP!, {PC}
324
325 @ end of yvup2bgr888
326
327
328/*-------------------------------------------------------------------------
329* FUNCTION : yyvup2bgr888_venum
330*--------------------------------------------------------------------------
331* DESCRIPTION : Perform YYVU planar to BGR888 conversion.
332*--------------------------------------------------------------------------
333* C PROTOTYPE : void yyvup2bgr888_venum(uint8_t *p_y,
334* uint8_t *p_cr,
335* uint8_t *p_cb,
336* uint8_t *p_bgr888,
337* uint32_t length)
338*--------------------------------------------------------------------------
339* REG INPUT : R0: uint8_t *p_y
340* pointer to the input Y Line
341* R1: uint8_t *p_cr
342* pointer to the input Cr Line
343* R2: uint8_t *p_cb
344* pointer to the input Cb Line
345* R3: uint8_t *p_bgr888
346* pointer to the output BGR Line
347* R12: uint32_t length
348* width of Line
349*--------------------------------------------------------------------------
350* STACK ARG : None
351*--------------------------------------------------------------------------
352* REG OUTPUT : None
353*--------------------------------------------------------------------------
354* MEM INPUT : p_y - a line of Y pixels
355* p_cr - a line of Cr pixels
356* p_cb - a line of Cb pixels
357* length - the width of the input line
358*--------------------------------------------------------------------------
359* MEM OUTPUT : p_bgr888 - the converted bgr pixels
360*--------------------------------------------------------------------------
361* REG AFFECTED : ARM: R0-R4, R12
362* NEON: Q0-Q15
363*--------------------------------------------------------------------------
364* STACK USAGE : none
365*--------------------------------------------------------------------------
366* CYCLES : none
367*
368*--------------------------------------------------------------------------
369* NOTES :
370*--------------------------------------------------------------------------
371*/
372.type yyvup2bgr888_venum, %function
373yyvup2bgr888_venum:
374 /*-------------------------------------------------------------------------
375 * Store stack registers
376 * ------------------------------------------------------------------------ */
377 STMFD SP!, {LR}
378
379 VPUSH {D8-D15}
380
381 PLD [R0, R3] @ preload luma line
382
383 ADR R12, constants
384
385 VLD1.S16 {D6, D7}, [R12]! @ D6, D7: 359 | -88 | -183 | 454 | 256 | 0 | 255 | 0
386 VLD1.S32 {D30, D31}, [R12] @ Q15 : -45824 | 34816 | -57984 | X
387
388 /*-------------------------------------------------------------------------
389 * Load the 5th parameter via stack
390 * R0 ~ R3 are used to pass the first 4 parameters, the 5th and above
391 * parameters are passed via stack
392 * ------------------------------------------------------------------------ */
393 LDR R12, [SP, #68] @ LR is pushed into the stack so SP is
394 @ decreased by 4,
395 @ D8-D15 are also pushed into the stack
396 @ so SP is decreased by
397 @ 8-byte/D-Register * 8 D-Registers = 64,
398 @ so SP needs to be increased by 64+4=68
399 @ to get the value that was first pushed
400 @ into stack (the 5th parameter passed in
401 @ throught stack)
402
403 /*-------------------------------------------------------------------------
404 * Load clamping parameters to duplicate vector elements
405 * ------------------------------------------------------------------------ */
406 VDUP.S16 Q4, D7[1] @ Q4: 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0
407 VDUP.S16 Q5, D7[2] @ Q5: 255 | 255 | 255 | 255 | 255 | 255 | 255 | 255
408
409 /*-------------------------------------------------------------------------
410 * Read bias
411 * ------------------------------------------------------------------------ */
412 VDUP.S32 Q0, D30[0] @ Q0: -45824 | -45824 | -45824 | -45824
413 VDUP.S32 Q1, D30[1] @ Q1: 34816 | 34816 | 34816 | 34816
414 VDUP.S32 Q2, D31[0] @ Q2: -70688 | -70688 | -70688 | -70688
415
416
417 /*-------------------------------------------------------------------------
418 * The main loop
419 * ------------------------------------------------------------------------ */
420loop_yyvup2bgr888:
421
422 /*-------------------------------------------------------------------------
423 * Load input from Y, V and U
424 * D12, D13: Y0 Y2 Y4 Y6 Y8 Y10 Y12 Y14, Y1 Y3 Y5 Y7 Y9 Y11 Y13 Y15
425 * D14 : V0 V1 V2 V3 V4 V5 V6 V7
426 * D15 : U0 U1 U2 U3 U4 U5 U6 U7
427 * ------------------------------------------------------------------------ */
428 VLD2.U8 {D12,D13}, [p_y]! @ Load 16 Luma elements (uint8) to D12, D13
429 VLD1.U8 {D14}, [p_cr]! @ Load 8 Cr elements (uint8) to D14
430 VLD1.U8 {D15}, [p_cb]! @ Load 8 Cb elements (uint8) to D15
431
432 /*-------------------------------------------------------------------------
433 * Expand uint8 value to uint16
434 * D24, D25: Y0 Y2 Y4 Y6 Y8 Y10 Y12 Y14
435 * D26, D27: Y1 Y3 Y5 Y7 Y9 Y11 Y13 Y15
436 * D28, D29: V0 V1 V2 V3 V4 V5 V6 V7
437 * D30, D31: U0 U1 U2 U3 U4 U5 U6 U7
438 * ------------------------------------------------------------------------ */
439 VMOVL.U8 Q12, D12
440 VMOVL.U8 Q13, D13
441 VMOVL.U8 Q14, D14
442 VMOVL.U8 Q15, D15
443
444 /*-------------------------------------------------------------------------
445 * Multiply contribution from chrominance, results are in 32-bit
446 * ------------------------------------------------------------------------ */
447 VMULL.S16 Q6, D28, D6[0] @ Q6: 359*(V0,V1,V2,V3) Red
448 VMULL.S16 Q7, D30, D6[1] @ Q7: -88*(U0,U1,U2,U3) Green
449 VMLAL.S16 Q7, D28, D6[2] @ q7: -88*(U0,U1,U2,U3) - 183*(V0,V1,V2,V3)
450 VMULL.S16 Q8, D30, D6[3] @ q8: 454*(U0,U1,U2,U3) Blue
451
452 /*-------------------------------------------------------------------------
453 * Add bias
454 * ------------------------------------------------------------------------ */
455 VADD.S32 Q6, Q0 @ Q6 add Red bias -45824
456 VADD.S32 Q7, Q1 @ Q7 add Green bias 34816
457 VADD.S32 Q8, Q2 @ Q8 add Blue bias -57984
458
459 /*-------------------------------------------------------------------------
460 * Calculate Red, Green, Blue
461 * ------------------------------------------------------------------------ */
462 VMOV.S32 Q9, Q6
463 VMLAL.S16 Q6, D24, D7[0] @ Q6: R0, R2, R4, R6 in 32-bit Q8 format
464 VMLAL.S16 Q9, D26, D7[0] @ Q9: R1, R3, R5, R7 in 32-bit Q8 format
465
466 VMOV.S32 Q10, Q7
467 VMLAL.S16 Q7, D24, D7[0] @ Q7: G0, G2, G4, G6 in 32-bit Q8 format
468 VMLAL.S16 Q10, D26, D7[0] @ Q10: G1, G3, G5, G7 in 32-bit Q8 format
469
470 VMOV.S32 Q11, Q8
471 VMLAL.S16 Q8, D24, D7[0] @ Q8: B0, B2, B4, B6 in 32-bit Q8 format
472 VMLAL.S16 Q11, D26, D7[0] @ Q11: B1, B3, B5, B7 in 32-bit Q8 format
473
474 /*-------------------------------------------------------------------------
475 * Right shift eight bits with rounding
476 * ------------------------------------------------------------------------ */
477 VSHRN.S32 D12, Q6, #8 @ D12: R0 R2 R4 R6 in 16-bit Q0 format
478 VSHRN.S32 D13, Q9, #8 @ D13: R1 R3 R5 R7 in 16-bit Q0 format
479 VZIP.16 D12, D13 @ Q6 : R0 R1 R2 R3 R4 R5 R6 R7
480
481 VSHRN.S32 D18, Q7, #8 @ D18: G0 G2 G4 G6 in 16-bit Q0 format
482 VSHRN.S32 D19, Q10, #8 @ D19: G1 G3 G5 G7 in 16-bit Q0 format
483 VZIP.16 D18, D19 @ Q9 : G0 G1 G2 G3 G4 G5 G6 G7
484
485 VSHRN.S32 D20, Q8, #8 @ D20: B0 B2 B4 B6 in 16-bit Q0 format
486 VSHRN.S32 D21, Q11, #8 @ D21: B1 B3 B5 B7 in 16-bit Q0 format
487 VZIP.16 D20, D21 @ Q10: B0 B1 B2 B3 B4 B5 B6 B7
488
489 /*-------------------------------------------------------------------------
490 * Clamp the value to be within [0~255]
491 * ------------------------------------------------------------------------ */
492 VMAX.S16 Q10, Q10, Q4 @ if Q10 < 0, Q10 = 0
493 VMIN.S16 Q10, Q10, Q5 @ if Q10 > 255, Q10 = 255
494 VQMOVUN.S16 D23, Q10 @ store Blue to D23, narrow the value from int16 to int8
495
496 VMAX.S16 Q9, Q9, Q4 @ if Q9 < 0, Q9 = 0
497 VMIN.S16 Q9, Q9, Q5 @ if Q9 > 255, Q9 = 255
498 VQMOVUN.S16 D22, Q9 @ store Green to D22, narrow the value from int16 to int8
499
500 VMAX.S16 Q6, Q6, Q4 @ if Q6 < 0, Q6 = 0
501 VMIN.S16 Q6, Q6, Q5 @ if Q6 > 255, Q6 = 255
502 VQMOVUN.S16 D21, Q6 @ store Red to D21, narrow the value from int16 to int8
503
504 SUBS length, length, #8 @ check if the length is less than 8
505
506 BMI trailing_yyvup2bgr888 @ jump to trailing processing if remaining length is less than 8
507
508 VST3.U8 {D21,D22,D23}, [p_bgr]! @ vector store Blue, Green, Red to destination
509 @ Red at LSB
510
511 BEQ end_yyvup2bgr888 @ done if exactly 8 pixel processed in the loop
512
513 /*-------------------------------------------------------------------------
514 * Done with the first 8 elements, continue on the next 8 elements
515 * ------------------------------------------------------------------------ */
516
517 /*-------------------------------------------------------------------------
518 * Multiply contribution from chrominance, results are in 32-bit
519 * ------------------------------------------------------------------------ */
520 VMULL.S16 Q6, D29, D6[0] @ Q6: 359*(V4,V5,V6,V7) Red
521 VMULL.S16 Q7, D31, D6[1] @ Q7: -88*(U4,U5,U6,U7) Green
522 VMLAL.S16 Q7, D29, D6[2] @ Q7: -88*(U4,U5,U6,U7) - 183*(V4,V5,V6,V7)
523 VMULL.S16 Q8, D31, D6[3] @ Q8: 454*(U4,U5,U6,U7) Blue
524
525 /*-------------------------------------------------------------------------
526 * Add bias
527 * ------------------------------------------------------------------------ */
528 VADD.S32 Q6, Q0 @ Q6 add Red bias -45824
529 VADD.S32 Q7, Q1 @ Q7 add Green bias 34816
530 VADD.S32 Q8, Q2 @ Q8 add Blue bias -70688
531
532 /*-------------------------------------------------------------------------
533 * Calculate Red, Green, Blue
534 * ------------------------------------------------------------------------ */
535 VMOV.S32 Q9, Q6
536 VMLAL.S16 Q6, D25, D7[0] @ Q6: R8 R10 R12 R14 in 32-bit Q8 format
537 VMLAL.S16 Q9, D27, D7[0] @ Q9: R9 R11 R13 R15 in 32-bit Q8 format
538
539 VMOV.S32 Q10, Q7
540 VMLAL.S16 Q7, D25, D7[0] @ Q7: G0, G2, G4, G6 in 32-bit Q8 format
541 VMLAL.S16 Q10, D27, D7[0] @ Q10 : G1, G3, G5, G7 in 32-bit Q8 format
542
543 VMOV.S32 Q11, Q8
544 VMLAL.S16 Q8, D25, D7[0] @ Q8: B0, B2, B4, B6 in 32-bit Q8 format
545 VMLAL.S16 Q11, D27, D7[0] @ Q11 : B1, B3, B5, B7 in 32-bit Q8 format
546
547 /*-------------------------------------------------------------------------
548 * Right shift eight bits with rounding
549 * ------------------------------------------------------------------------ */
550 VSHRN.S32 D12, Q6, #8 @ D12: R8 R10 R12 R14 in 16-bit Q0 format
551 VSHRN.S32 D13, Q9, #8 @ D13: R9 R11 R13 R15 in 16-bit Q0 format
552 VZIP.16 D12, D13 @ Q6: R8 R9 R10 R11 R12 R13 R14 R15
553
554 VSHRN.S32 D18, Q7, #8 @ D18: G8 G10 G12 G14 in 16-bit Q0 format
555 VSHRN.S32 D19, Q10, #8 @ D19: G9 G11 G13 G15 in 16-bit Q0 format
556 VZIP.16 D18, D19 @ Q9: G8 G9 G10 G11 G12 G13 G14 G15
557
558 VSHRN.S32 D20, Q8, #8 @ D20: B8 B10 B12 B14 in 16-bit Q0 format
559 VSHRN.S32 D21, Q11, #8 @ D21: B9 B11 B13 B15 in 16-bit Q0 format
560 VZIP.16 D20, D21 @ Q10: B8 B9 B10 B11 B12 B13 B14 B15
561
562 /*-------------------------------------------------------------------------
563 * Clamp the value to be within [0~255]
564 * ------------------------------------------------------------------------ */
565 VMAX.S16 Q10, Q10, Q4 @ if Q10 < 0, Q10 = 0
566 VMIN.S16 Q10, Q10, Q5 @ if Q10 > 255, Q10 = 255
567 VQMOVUN.S16 D23, Q10 @ store Blue to D23, narrow the value from int16 to int8
568
569 VMAX.S16 Q9, Q9, Q4 @ if Q9 < 0, Q9 = 0
570 VMIN.S16 Q9, Q9, Q5 @ if Q9 > 255, Q9 = 255
571 VQMOVUN.S16 D22, Q9 @ store Green to D22, narrow the value from int16 to int8
572
573 VMAX.S16 Q6, Q6, Q4 @ if Q6 < 0, Q6 = 0
574 VMIN.S16 Q6, Q6, Q5 @ if Q6 > 255, Q6 = 255
575 VQMOVUN.S16 D21, Q6 @ store Red to D21, narrow the value from int16 to int8
576
577
578 SUBS length, length, #8 @ check if the length is less than 8
579
580 BMI trailing_yyvup2bgr888 @ jump to trailing processing if remaining length is less than 8
581
582 VST3.U8 {D21,D22,D23}, [p_bgr]! @ vector store Blue, Green, Red to destination
583 @ Red at LSB
584
585 BHI loop_yyvup2bgr888 @ loop if more than 8 pixels left
586
587 BEQ end_yyvup2bgr888 @ done if exactly 8 pixel processed in the loop
588
589
590trailing_yyvup2bgr888:
591 /*-------------------------------------------------------------------------
592 * There are from 1 ~ 7 pixels left in the trailing part.
593 * First adding 7 to the length so the length would be from 0 ~ 6.
594 * eg: 1 pixel left in the trailing part, so 1-8+7 = 0.
595 * Then save 1 pixel unconditionally since at least 1 pixels left in the
596 * trailing part.
597 * ------------------------------------------------------------------------ */
598 ADDS length, length, #7 @ there are 7 or less in the trailing part
599
600 VST3.U8 {D21[0],D22[0],D23[0]}, [p_bgr]! @ at least 1 pixel left in the trailing part
601 BEQ end_yyvup2bgr888 @ done if 0 pixel left
602
603 SUBS length, length, #1 @ update length counter
604 VST3.U8 {D21[1],D22[1],D23[1]}, [p_bgr]! @ store one more pixel
605 BEQ end_yyvup2bgr888 @ done if 0 pixel left
606
607 SUBS length, length, #1 @ update length counter
608 VST3.U8 {D21[2],D22[2],D23[2]}, [p_bgr]! @ store one more pixel
609 BEQ end_yyvup2bgr888 @ done if 0 pixel left
610
611 SUBS length, length, #1 @ update length counter
612 VST3.U8 {D21[3],D22[3],D23[3]}, [p_bgr]! @ store one more pixel
613 BEQ end_yyvup2bgr888 @ done if 0 pixel left
614
615 SUBS length, length, #1 @ update length counter
616 VST3.U8 {D21[4],D22[4],D23[4]}, [p_bgr]! @ store one more pixel
617 BEQ end_yyvup2bgr888 @ done if 0 pixel left
618
619 SUBS length, length, #1 @ update length counter
620 VST3.U8 {D21[5],D22[5],D23[5]}, [p_bgr]! @ store one more pixel
621 BEQ end_yyvup2bgr888 @ done if 0 pixel left
622
623 SUBS length, length, #1 @ update length counter
624 VST3.U8 {D21[6],D22[6],D23[6]}, [p_bgr]! @ store one more pixel
625
626end_yyvup2bgr888:
627 VPOP {D8-D15}
628 LDMFD SP!, {PC}
629
630 @ end of yyvup2bgr888
631
632.end